The present invention is directed to integrated circuits and their processing for the manufacture of electronic devices. More particularly, the invention provides a method for manufacturing an integrated lens structure for an image sensing device. But it would be recognized that the invention has a much broader range of applicability.
Integrated circuits have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Conventional integrated circuits provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of integrated circuits.
Increasing circuit density has not only improved the complexity and performance of integrated circuits but has also provided lower cost parts to the consumer. An integrated circuit or chip fabrication facility can cost hundreds of millions, or even billions, of U.S. dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of integrated circuits on it. Therefore, by making the individual devices of an integrated circuit smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in integrated fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed. Additionally, as devices require faster and faster designs, process limitations exist with certain conventional processes and materials.
An example of such a process is formation of device structures for imaging sensors such as charged coupled device (CCD), charge injected devices (CID), and others. Such imaging sensors (e.g., CCD, CID) include adaptive arrays of stacked color filters provided on micro lenses, which are incorporated into a silicon backplane. The silicon backplane includes MOS transistors and photo diode devices on the silicon wafers using different materials and processes due to process incompatibility. Such processes rely upon different tools and materials. Micro lenses are often stacked onto color filters, which are assembled using complex and cumbersome techniques. Accordingly, these sensors are often complex and difficult to manufacture. These and other limitations have been described in the present specification and more particularly below.
From the above, it is seen that an improved technique for processing devices is desired.